3D Power Packaging Made Real with Embedded Component and Substrate Technologies - P.M. Raj, APEC 2018

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    Conference Highlights
  • #IEEE
  • #APEC
  • #2018
  • #Power Electronics
  • #PELS
  • #IAS
  • #PSMA
  • #applied power
  • #engineering
  • #power science

Dr. P.M. Raj, Senior Research Engineer at Georgia Institute of Technology, delivers his keynote presentation on 3D Power Packaging, reliability challenges. Dr. Raj also compares different types of embedding and capacitors.

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  • Published on
  • March 7, 2018

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