High-Bandwidth Memory Interface Design

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Memory bandwidth has been increased significantly. There are many technical issues to enhance the memory interface such as TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. This tutorial provides overviews of recent advances in memory interface design both in architecture and circuit levels. Subtopics will include signal integrity and testing. The future trends for further bandwidth enhancement will be covered as well. 

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  • Published on
  • November 5, 2015

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