An Ultra-Wideband Low-Power ADPLL Chirp Synthesizer with Adaptive Loop Bandwidth in 65nm CMOS: RFIC Interactive Forum

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An Ultra-Wideband Low-Power ADPLL Chirp Synthesizer with Adaptive Loop Bandwidth in 65nm CMOS

Liheng Lou, Bo Chen, Kai Tang, Supeng Liu, Yuanjin Zheng; Nanyang Technological University, Singapore

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  • Published on
  • July 13, 2016

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