(23:31) Dr. Stéphane Moreau, CEA-Leti
From the First IEEE Hybrid Bonding Symposium
Summary: 3D Integrated Circuits (3D ICs) are revolutionizing the semiconductor industry by stacking multiple IC layers, which enhances performance and reduces power consumption. This technology overcomes the physical limitations of Moore’s Law, achieving greater speed and efficiency in a more compact form factor. Key interconnection methods used in 3D ICs include Through-Silicon Vias (TSVs), micro-bumps, and hybrid-bonding pads (HB). These circuits are crucial for applications that demand high performance and low power consumption, such as in high-performance computing and smartphones. Products leveraging 3D IC technology include CMOS Image Sensors (CIS), advanced processors, and memory devices.
While TSVs are commonly used in these products due to their effectiveness in die-level assembly and their role in simplifying testing and packaging, they come with limitations, such as Keep Out Zones (KOZs) and a typical Cu pillar pitch restricted to 20-40 um. For applications requiring finer vertical die-to-die connections with pitches smaller than 10 um, hybrid-bonding technology is emerging as a viable solution. As HB technology starts to gain attraction in the market, understanding how its reliability challenges are addressed is crucial. This talk will explore the reliability issues associated with HB-based interconnects and provide insights into how these challenges are being managed.
Bio: Dr. Stéphane Moreau received the PhD degree from François-Rabelais University (Tours, France), in 2005 on the environmental reliability of TRIAC, a power semiconductor switch. In 2006, he joined the CEA-LETI (Grenoble, France) first as a postdoctoral fellow then as a research engineer. His research area dealt with reliability issues of advanced modules (RDL, TSV, Cu pillar, hybrid bonding). He was a (invited) speaker with several cutting-edge conferences (IEEE International Reliability Physics Symposium – IRPS, IEEE Electronic Components and Technology Conference – ECTC, The Electrochemical Society – ECS) and contributed to international conferences and journals (IRPS, Microelectronics Reliability, Microelectronic Engineering). He also (co)authored more than 100 articles in the field of interconnect reliability.
For other edited videos from this symposium, visit https://attend.ieee.org/hbs/?page_id=456
(23:31) Dr. Stéphane Moreau, CEA-Leti
From the First IEEE Hybrid Bonding Symposium
Summary: 3D Integrated Circuits (3D ICs) are revolutionizing the semiconductor industry by stacking multiple IC layers, which enhances performance and reduces power consumption. This technology overcomes the physical limitations of Moore’s Law, achieving greater speed and efficiency in a more compact form factor. Key interconnection methods used in 3D ICs include Through-Silicon Vias (TSVs), micro-bumps, and hybrid-bonding pads (HB)....