Wafer-to-wafer Bonding Overlay: Co-Optimization with Lithography and Hidden Patterns

Presented at the 2026 IEEE Hybrid Bonding Symposium, Jan 22-23, 2026 in Silicon Valley.  More information below.
(36:15) Dr. Anton Alexeev, EV Group
Summary: Wafer-to-wafer (W2W) bonding is a pivotal enabler of three-dimensional (3D) integration in advanced semiconductor manufacturing, allowing vertical stacking of devices and chiplets from different process nodes or materials. As this technology moves closer to the front-end-of-line (FEOL), new overlay compensation strategies and new patterns of overlay emerge. They may come from the silicon crystal orientation, the wafers patterning or surface properties, even the bonding equipment itself if the recipes are not properly optimized. Understanding the nature of the bonding overlay patterns is essential for high-yield manufacturing. Repeatable distortion profiles enable advanced process control (APC) strategies in lithography, allowing pre-compensation or post-bond correction. Applications such as CMOS image sensors, 3D NAND, DRAM, and backside power delivery networks (BSPDN) depend heavily on precise overlay control. This presentation will discuss the bonding equipment, connection to the novel lithography compensation strategies and overlay measurement techniques characteristic for bonding applications. The peculiarities of the lithography pre-compensation strategies will be discussed for typical applications involving hybrid and aligned fusion bonding. The influence of the inhomogeneity of the wafer mechanical properties on the overlay will be shown. Moreover, steady-state and dynamic distortion fingerprints origins will be discussed including dielectric deposition, CMP, etching and natural bonding distortion.

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