A 12-b, 1-GS/s 6.1mW Current-Steering DAC in 14nm FinFET with 80dB SFDR for 2G/3G/4G Cellular Application: RFIC Industry Showcase 2017

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A 14nm FinFET CMOS 12-b current-steering digital-to-analog (DAC) for 2G/3G/4G cellular applications is presented. A bit segmentation of 6-bit thermometer and 6-bit binary is adopted, and it utilizes the dynamic element matching (DEM) technique to suppress the spurious tones caused by the current source mismatches in 3-D FinFETs. In addition, to keep the voltage drop across each transistor within long-term reliability limit, output switches are designed with shielding transistors while achieving make-before-break operation with the proposed low crossing point level shifter. The active area of a single DAC is 0.036 mm2, and its power consumption is 6.1 mW with SFDR of 80 dBc.

A 14nm FinFET CMOS 12-b current-steering digital-to-analog (DAC) for 2G/3G/4G cellular applications is presented. A bit segmentation...

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