Fault Isolation and Failure Analysis Challenges in Microelectronic Devices with Heterogeneous Integration: EDFAS FA Technology Roadmap Overview

(28:10) Dr. Yan Li, Samsung Advanced Packaging
From the 2024 IEEE Symposium on Reliability for Electronics and Photonics Packaging
Summary: Microelectronic devices with heterogeneous integration, such as 2.5D and 3D packages, Backside Power Delivery Network (BSPDN), Co-packaged Optics (CPO) etc, provides maximum device performance with much faster product development cycle. Fault isolation (FI) and failure analysis (FA) techniques are crucial during technology development as they are employed to identify defects causing electrical failures in devices or test vehicles, either at End of Line or post reliability tests. FI and FA methodologies are also adopted to investigate root cause of microelectronic device failures, and can provide valuable data feedbacks and solution paths for problem solving of technical issues during product development. However, the high level of functional integration and the complex package architecture in heterogenous integration pose significant challenges for conventional fault isolation (FI) and failure analysis (FA) methods. Electronic Device Failure Analysis Society (EDFAS), an international FI and FA professional society with experts from both semiconductor industry and academia, forms FA technology Roadmap Councils to help identify and fulfill FI and FA technical gaps for microelectronic devices. This paper provides a through overview of current FI and FA technique gaps and roadmaps proposed by EDFAS FA technology Roadmap Councils, which includes techniques for die-level and package-level fault isolation, high resolution imaging, die removal, delayering, cross-section, nanoprobing, electron microscopy, and material analysis. Current capability and future development trends for Artificial Intelligence (AI) assisted FI and FA methodologies are also highlighted.
Bio: Dr. Yan Li received her Ph.D. degree in Materials Science and Engineering from Northwestern University, U.S.A. in 2006, and her M.S and B.S degree in Physics from Peking University, China. After more than 17 years in Intel Arizona focusing on advanced packaging technology developments, she joined Samsung Advanced Packaging group in San Jose as a Principal Engineer in 2023. Dr. Li has been an active member of Minerals Metals and Materials Society (TMS), Institute of Electrical and Electronics Engineers (IEEE), American Society for Metals (ASM), and Electronic Device Failure Analysis Society (EDFAS). She has been appointed as TMS and International Symposium for Testing and Failure Analysis (ISTFA) annual conference organizer since 2011, EDFAS board member since 2019, and EDFAS vice president since 2024. Dr. Li has published over 20 papers and two patents in the microelectronic packaging area. She is an associated editor of “Microelectronics Reliability” and the co-editor of three semiconductor industry highly recognized books on 3D Microelectronic Packaging and Autonomous Vehicles.

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