Perturbation of the Electrostatic Potential distribution in HV-ICs Induced by Space Charge in Epoxy Packaging

(22:37) Luigi Balestra, University of Bologna — Epoxy molding compounds (EMCs) are the standard encapsulation materials for high-voltage integrated circuits (HV-ICs), due to their excellent dielectric strength, thermal stability, and mechanical robustness. However, their reliability is strongly influenced by the presence of space charge. When electrical stress is applied, injected carriers can accumulate at the EMC/passivation interface of the HV-IC, distorting the electrostatic potential distribution and ultimately compromising insulation performance and device reliability. This phenomenon becomes particularly critical in the presence of moisture which increases the conductivity of the EMC by reducing the trapping effects and enhancing the transport of ions. To estimate the electrostatic-potential distortion in EMC-encapsulated HV-ICs, dedicated test structures emulating the geometry of an integrated circuit have been developed. Moreover, they integrate two p-channel gate-less MOSFETs as charge sensors beneath the EMC layer and an equivalent calibration MOSFET, enabling indirect probing of the local electrostatic potential as function of time. TCAD simulations reveal that, when a negative DC bias is applied to the HV electrode, the electrostatic potential initially exhibits a strong distortion near the EMC/Passivation interface but gradually evolves toward a linear profile between the high-voltage and ground pads. This transition reflects the shift from a dielectric-like to a resistive-like behavior of the encapsulant under steady-state conditions. Experimental characterization with the embedded sensors corroborates these predictions: by tracking the current variations induced by charge accumulation at the EMC/passivation interface, we observe that the extracted potential distribution evolves in time toward the expected linear profile, especially under wet conditions. Results provide a quantitative framework for predicting long-term electrostatic potential distributions in packaged HV-ICs and assessing insulation reliability under realistic operating stresses, thereby supporting design strategies in next-generation high-voltage electronics.
Bio: Luigi Balestra is a Junior Assistant Professor in the Department of Electrical and Electronic Engineering at the University of Bologna, focusing on the modeling and simulation of semiconductor devices. He earned his M.Sc. in Electrical Engineering in 2018 and his Ph.D. in Electronic Engineering in 2022, both from the University of Bologna. His research emphasizes power semiconductor devices, wide bandgap technologies, and reliability issues related to passivation and packaging materials.

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