Recent Advances And Trends In Advanced Packaging

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#heterogeneous integration #interconnect density #electrical performance #bonding #2.5D #3D #chiplets #silicon bridges

(1:12:20 + Q&A) -- HI, interconnect density, electrical performance, bonding, 2.5D, 3D, chiplets, silicon bridges, advances ...  Dr John H. Lau, Unimicron Technology.  In this lecture, semiconductor advanced packaging is defined. The kinds of advanced packaging are ranked based on their interconnect density and electrical performance and are grouped into 2D, 2.1D, 2.3D, 2.5D, and 3D IC integration. Key enabling technologies such as flip chip and fan-out are briefly mentioned. The trends and challenges (opportunities) of advanced packaging are discussed. Also, in this lecture, chiplet design and heterogeneous integration packaging are defined. The chiplet design and heterogeneous integration packaging such as those used by Xilinx, AMD, Intel, TSMC, and Samsung are presented and discussed. The lateral communication between chiplets such as the silicon bridges embedded in organic build-up package substrate and fan-out epoxy molding compound as well as flexible bridges are presented. Key enabling technologies such as thermocompression bonding and hybrid bonding are briefly mentioned. The trends and challenges (opportunities) of chiplet design and heterogeneous integration packaging are discussed.

John Lau, with more than 40 years of R&D and manufacturing experience in semiconductor packaging, has published more than 510 peer-reviewed papers, 40 issued and pending U.S. patents, and 22 textbooks. He has been actively participating in industry/academy/society meetings/conferences to contribute, learn, and share. He has taught short courses at ECTC and other IEEE conferences.

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(1:12:20 + Q&A) -- HI, interconnect density, electrical performance, bonding, 2.5D, 3D, chiplets, silicon bridges, advances ...  Dr John H. Lau, Unimicron Technology.  In this lecture, semiconductor advanced packaging is defined. The kinds of advanced packaging are ranked based on their interconnect density and electrical performance and are grouped into 2D, 2.1D, 2.3D, 2.5D, and 3D IC integration...

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