Greg Yeric is Director of Future Silicon Technology for ARM Research, analyzing the future technology trends, predicting effects on future ARM products, coordinating internal and external research, including Design-Technology Co-Optimization with industrial and academic partners, as well as technology incubation and enablement.
His career experiences began in device physics and process integration, then moved to test chips for technology development and yield improvement, expanding to yield analysis software and Design For Manufacturing (DFM). At ARM he utilizes this background to bridge design and technology, with work aligned to what is commonly called Design-Technology Co-Optimization (DTCO). He manages a silicon-focused group for ARM Research, with projects including technology prediction, reliability and resilience, novel technology incubation, and test chips.
His DTCO focus affords him the opportunity to work with a variety of groups from industry to academia. His invited talks include the IEEE International Electron Devices Meeting (IEDM), IEEE Custom Integrated Circuits Conference (CICC), International EUVL Symposium, SPIE Lithography, IEEE International Conference on Microelectronic Test Structures, IEEE Design Automation Conference, IEEE DFM&Y Workshop, IEEE VLSI Test Conf., and Solid State Technology magazine, with over twenty publications.
Specialties include: DTCO, DFM, technology development, technology prediction, test chips, yield improvement, technical sales, technical marketing, RFPs, product development including software development, and project management.