IEEE SWISS SSC TALKS Nov2020 PHD STUDENT UPDATE: LOW POWER OSCILLATORS

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#Fully integrated time reference

This is a recording of a Ph.D. Student Update program in the Switzerland Solid-State Circuit chapter hosted on 26 November 2020 Discussing a work entitled Presented at VLSI 2020.

A 8.7ppm/°C, 694nW, One-Point Calibrated RC Oscillator Using a Nonlinearity-Aware Dual Phase-Locked Loop and DSM ctr FLL This presentation is about an on-chip timer composed of two DSM-controlled RC oscillators, locked through a non-linearity aware digital dual phase-locked loop.

The proposed design achieves an accurate temperature coefficient below 8.7ppm/°C from 10 samples from two different wafer lots with only one-point calibration and an Allan deviation floor of 4 ppm. The power consumption is 694nW at 116 kHz.

This is a recording of a Ph.D. Student Update program in the Switzerland Solid-State Circuit chapter hosted on 26 November 2020 Discussing a work entitled Presented at VLSI 2020.

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