Semiconductor Packaging: The Future Is Now

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#heterogeneous integration #ic packaging #workforce training #2.5D #3D #Packaging Research Center #GaTech

(49:15 + Q&A) -- emerging applications, on-shoring, US univ programs in semiconductor packaging, curriculum development, workforce ... Prof. Madhavan Swaminathan, Director, 3D Systems Packaging Research Center (PRC), Georgia Tech.  The recent buzz in the semiconductor industry is all about advanced packaging, a heterogeneous platform that enables the integration and miniaturization of systems. With supply chain shortages and most of semiconductor manufacturing being done off-shore, there is a wake-up call by the US government to regain US leadership and competitiveness in this upcoming area. This is a prime opportunity for US universities to step in and drive innovation, transition these innovations into manufacturing, while creating the next workforce. The fundamental challenge, however, is that few universities in the United States have research and educational programs in semiconductor packaging!
After providing a brief introduction into the reasons why heterogeneous integration using semiconductor packaging is a means to continue Moore’s law, I present on some of our recent advances and contributions in System on Package (SoP) technologies, a concept that we have been pioneering for almost three decades, that has relevance to emerging applications in Artificial Intelligence, Wireless Communications, Automotive, and Harsh Environments. I also summarize some of our activities in curriculum development along with a snapshot of the Packaging Research Center, a graduated NSF Engineering Research Center (ERC) currently in its 28th year.

Madhavan Swaminathan is the John Pippin Chair in Microsystems Packaging & Electromagnetics in the School of Electrical and Computer Engineering (ECE), Professor in ECE with a joint appointment in the School of Materials Science and Engineering (MSE), and Director of the 3D Systems Packaging Research Center (PRC), Georgia Tech. He also serves as the Site Director for the NSF Center for Advanced Electronics through Machine Learning (CAEML) and Theme Leader for Heterogeneous Integration, at the SRC JUMP ASCENT Center. Prior to joining GT, he was with IBM working on packaging for supercomputers.
He is the author of 550+ refereed technical publications and holds 31 patents. He is the primary author and co-editor of 3 books and 5 book chapters, founder and co-founder of two start-up companies, and founder of the IEEE Conference on Electrical Design of Advanced Packaging and Systems (EDAPS), a premier conference sponsored by the IEEE Electronics Packaging Society (EPS) currently in its 20th year. He is an IEEE Fellow and has served as the Distinguished Lecturer for the IEEE Electromagnetic Compatibility (EMC) society. He received his MS and PhD degrees in Electrical Engineering from Syracuse University in 1989 and 1991, respectively.

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(49:15 + Q&A) -- emerging applications, on-shoring, US univ programs in semiconductor packaging, curriculum development, workforce ... Prof. Madhavan Swaminathan, Director, 3D Systems Packaging Research Center (PRC), Georgia Tech.  The recent buzz in the semiconductor industry is all about advanced packaging, a heterogeneous platform that enables the integration and miniaturization of systems. With supply chain shortages and most of semiconductor manufacturing being done off-shore, there is a wake-up call by the US government to regain US leadership ...

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