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An Integrated Optical Parallel Multiplier Exploiting Approximate Binary Logarithms - Jun Shiomi - ICRC 2018

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#IEEE #ICRC #Rebooting Computing #2018 #conference #event #computing #technology #optics #optical logical circuit #circuit design #parallel multiplier #nanophotonics #integrated optics #optical devices #logarithm #optoelectronic circuit

On behalf of their research group Jun Shiomi, Kyoto University, presents the technical specifications required to achieve the goal of ultra-fast optical logical circuit design. Shiomi reviews the parallel multiplier using nanophotonic devices.

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