Random Failure Reduction: Strategy for Advanced Semiconductor Devices Production

19 views
Download
  • Share
#semiconductor reliability #failure modes #electronics #advanced packaging #heterogeneous integration

(57:53 + Q&A) Dr. Antai Xu, Senior Director of Reliability Engineering, Xilinx.  Plenary Talk: As Si processes enter nano and atomic scales, integrating semiconductor devices into SiPs has become an important technology to extend product roadmaps. On the center stage of this progress, product reliability performance provides a measuring criterion to validate, and eventually qualify, the integrity of these products. In more recent integration technologies, such as 2.5D and 3D packaging, highly accelerated and dynamic reliability testing conditions are attempted. These tests, occurring side-by-side with engineering development, have greatly sped up materials selection and process optimization, as well as providing guidance for better reliability performance over time. In addition, studying reliability failures fulfills the need to predict product field risk. In many cases, these analyses define the key parameter for reliability monitor during production, and in some case, also help customers to understand the boundary conditions of their product’s mission profile. In this talk, the following points will be addressed:
— Bathtub curve, Wear out and Margin in the advanced SiP products
— Lifetime model, test to failure, and reliability specifications
— Very long manufacturing cycle time, random failure, redundancy
— Thermo management, hotspots and acceleration
Dr. Antai Xu has been the Senior Director of Reliability Engineering at Xilinx Corporation since 2015. He is leading the company’s NPI qualifications in all 16 nm and 7 nm technologies, and has worked on various challenges in 2.5D & 3D Si integration. Prior to joining Xilinx, he served as the Division Head of Backend Quality and Reliability TSMC, where he led the reliability testing and qualification of the two breakthrough technologies, namely CoWoS & InFO. Both technologies were successfully released to production with remarkable impact to the semiconductor products roadmap in the late stage of Moore’s Law. Dr. Xu’s broader experiences also include 30 years of R&D, Materials Processing, Reliability as well as Executive Management in the industry of Aerospace Electronics, Magnetic Storage, O/MEMS, and Bio/DNA testing systems. He received his Ph.D. from Purdue University in Materials Science, and M.S. from Georgetown University in Physics.

For videos/slides from other talks at the Symposium on Reliability of Electronics and Photonics Packaging (REPP'21), please visit our website and join our IEEE Dlist:  attend.ieee.org/repp

(57:53 + Q&A) Antai Xu, Senior Director of Reliability Engineering, Xilinx.  Plenary Talk: As Si processes enter nano and atomic scales, integrating semiconductor devices into SiPs has become an important technology to extend product roadmaps. On the center stage of this progress, product reliability performance provides a measuring criterion to validate, and eventually qualify, the integrity of these products....

Speakers in this video

Advertisment

Advertisment