Cryo-CMOS Transceivers for Control and Readout of Semiconductor Spin Qubits

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#quantum computing #cryogenic qubits #cryogenic electronics #control electronics #cryo-CMOS

(38:48 + Q&A) Masoud Babaie, Associate Professor, Delft University of Technology -- Presentation from 2023 Workshop on Quantum Computing: Devices, Cryogenic Electronics and Packaging (QC-DCEP) ... 
Summary: A fault-tolerant quantum computer operates at deep cryogenic temperatures (typically 20-100mK) and requires massive yet very precise control electronics for the manipulation and read-out of individual quantum bits (qubits). The most complex state-of-the-art quantum computer (with 53 qubits) requires tens of bulky custom-made electronic modules operating at room temperature and connected to cryogenic qubits via hundreds of coaxial cables. However, this approach is not practical for implementing fault-tolerant quantum computers with millions of qubits due to the utter interconnect complexity, poor system scalability, and reliability. A better alternative would be to integrate the qubits and the control electronics on the same die or package and operate them at the same temperature. Toward this goal, electronics able to operate at cryogenic temperatures in close proximity to the qubits must be developed.
In this presentation, the system-level specifications for control and readout electronics are first discussed. Then, we review the characteristics and behavior of CMOS active and passive components at cryogenic temperatures. By exploiting the developed CMOS and qubit models, we develop the block diagram and circuit schematic of a digitally intensive wideband transmitter capable of operating at 3K and controlling 32 frequency-multiplexed qubits. It also offers waveform shaping flexibility, minimum execution latency, and straightforward integration in the existing quantum computing stack. The cryogenic controller is used to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots. Then, we shift the gear towards the challenges in the design of a cryogenic-CMOS (Cryo-CMOS) receiver for the gate-based readout of spin qubits. Finally, after showing the electrical performance, the cryo-CMOS receiver is used to measure the DQD charge stability diagrams and quantify the maximum achievable SNR of the gate-based readout architecture. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.
Masoud Babaie is currently an Associate Professor at the Delft University of Technology, Delft, The Netherlands. His research interests include RF/millimeter-wave integrated circuits for wireless communications and cryogenic electronics for quantum computation. Dr. Babaie currently serves as a technical program committee (TPC) member of the ISSCC and ESSCIRC conferences. He was a co-recipient of the 2019 IEEE ISSCC Demonstration Session Certificate of Recognition, the 2020 IEEE ISSCC Jan Van Vessem Award for Outstanding European Paper, the 2022 IEEE CICC Best Paper Award, the 2023 IEEE IMS Best student paper award. In 2019, he received the Veni Award from the Netherlands Organization for scientific research.

Additional videos from the QC-DCEP Workhop can be accessed at https://attend.ieee.org/qc-dcep.

(38:48 + Q&A) Masoud Babaie, Associate Professor, Delft University of Technology -- Presentation from 2023 Workshop on Quantum Computing: Devices, Cryogenic Electronics and Packaging (QC-DCEP) ... 
Summary: A fault-tolerant quantum computer operates at deep cryogenic temperatures (typically 20-100mK) and requires massive yet very precise control electronics for the manipulation and read-out of individual quantum bits (qubits). The most complex state-of-the-art quantum computer (with 53 qubits) requires tens of bulky custom-made electronic modules operating at room temperature and connected to cryogenic qubits ...

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